
url_encode:     file format elf64-littleaarch64


Disassembly of section .init:

0000000000400480 <.init>:
  400480:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400484:	910003fd 	mov	x29, sp
  400488:	94000030 	bl	400548 <printf@plt+0x58>
  40048c:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400490:	d65f03c0 	ret

Disassembly of section .plt:

00000000004004a0 <__libc_start_main@plt-0x20>:
  4004a0:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  4004a4:	90000090 	adrp	x16, 410000 <printf@plt+0xfb10>
  4004a8:	f947fe11 	ldr	x17, [x16, #4088]
  4004ac:	913fe210 	add	x16, x16, #0xff8
  4004b0:	d61f0220 	br	x17
  4004b4:	d503201f 	nop
  4004b8:	d503201f 	nop
  4004bc:	d503201f 	nop

00000000004004c0 <__libc_start_main@plt>:
  4004c0:	b0000090 	adrp	x16, 411000 <printf@plt+0x10b10>
  4004c4:	f9400211 	ldr	x17, [x16]
  4004c8:	91000210 	add	x16, x16, #0x0
  4004cc:	d61f0220 	br	x17

00000000004004d0 <__gmon_start__@plt>:
  4004d0:	b0000090 	adrp	x16, 411000 <printf@plt+0x10b10>
  4004d4:	f9400611 	ldr	x17, [x16, #8]
  4004d8:	91002210 	add	x16, x16, #0x8
  4004dc:	d61f0220 	br	x17

00000000004004e0 <abort@plt>:
  4004e0:	b0000090 	adrp	x16, 411000 <printf@plt+0x10b10>
  4004e4:	f9400a11 	ldr	x17, [x16, #16]
  4004e8:	91004210 	add	x16, x16, #0x10
  4004ec:	d61f0220 	br	x17

00000000004004f0 <printf@plt>:
  4004f0:	b0000090 	adrp	x16, 411000 <printf@plt+0x10b10>
  4004f4:	f9400e11 	ldr	x17, [x16, #24]
  4004f8:	91006210 	add	x16, x16, #0x18
  4004fc:	d61f0220 	br	x17

Disassembly of section .text:

0000000000400500 <.text>:
  400500:	d280001d 	mov	x29, #0x0                   	// #0
  400504:	d280001e 	mov	x30, #0x0                   	// #0
  400508:	aa0003e5 	mov	x5, x0
  40050c:	f94003e1 	ldr	x1, [sp]
  400510:	910023e2 	add	x2, sp, #0x8
  400514:	910003e6 	mov	x6, sp
  400518:	580000c0 	ldr	x0, 400530 <printf@plt+0x40>
  40051c:	580000e3 	ldr	x3, 400538 <printf@plt+0x48>
  400520:	58000104 	ldr	x4, 400540 <printf@plt+0x50>
  400524:	97ffffe7 	bl	4004c0 <__libc_start_main@plt>
  400528:	97ffffee 	bl	4004e0 <abort@plt>
  40052c:	00000000 	.inst	0x00000000 ; undefined
  400530:	00400698 	.inst	0x00400698 ; undefined
  400534:	00000000 	.inst	0x00000000 ; undefined
  400538:	004006d0 	.inst	0x004006d0 ; undefined
  40053c:	00000000 	.inst	0x00000000 ; undefined
  400540:	00400750 	.inst	0x00400750 ; undefined
  400544:	00000000 	.inst	0x00000000 ; undefined
  400548:	90000080 	adrp	x0, 410000 <printf@plt+0xfb10>
  40054c:	f947f000 	ldr	x0, [x0, #4064]
  400550:	b4000040 	cbz	x0, 400558 <printf@plt+0x68>
  400554:	17ffffdf 	b	4004d0 <__gmon_start__@plt>
  400558:	d65f03c0 	ret
  40055c:	00000000 	.inst	0x00000000 ; undefined
  400560:	b0000080 	adrp	x0, 411000 <printf@plt+0x10b10>
  400564:	9100c000 	add	x0, x0, #0x30
  400568:	b0000081 	adrp	x1, 411000 <printf@plt+0x10b10>
  40056c:	9100c021 	add	x1, x1, #0x30
  400570:	eb00003f 	cmp	x1, x0
  400574:	540000a0 	b.eq	400588 <printf@plt+0x98>  // b.none
  400578:	90000001 	adrp	x1, 400000 <__libc_start_main@plt-0x4c0>
  40057c:	f943b821 	ldr	x1, [x1, #1904]
  400580:	b4000041 	cbz	x1, 400588 <printf@plt+0x98>
  400584:	d61f0020 	br	x1
  400588:	d65f03c0 	ret
  40058c:	d503201f 	nop
  400590:	b0000080 	adrp	x0, 411000 <printf@plt+0x10b10>
  400594:	9100c000 	add	x0, x0, #0x30
  400598:	b0000081 	adrp	x1, 411000 <printf@plt+0x10b10>
  40059c:	9100c021 	add	x1, x1, #0x30
  4005a0:	cb000021 	sub	x1, x1, x0
  4005a4:	9343fc21 	asr	x1, x1, #3
  4005a8:	8b41fc21 	add	x1, x1, x1, lsr #63
  4005ac:	9341fc21 	asr	x1, x1, #1
  4005b0:	b40000a1 	cbz	x1, 4005c4 <printf@plt+0xd4>
  4005b4:	90000002 	adrp	x2, 400000 <__libc_start_main@plt-0x4c0>
  4005b8:	f943bc42 	ldr	x2, [x2, #1912]
  4005bc:	b4000042 	cbz	x2, 4005c4 <printf@plt+0xd4>
  4005c0:	d61f0040 	br	x2
  4005c4:	d65f03c0 	ret
  4005c8:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  4005cc:	910003fd 	mov	x29, sp
  4005d0:	f9000bf3 	str	x19, [sp, #16]
  4005d4:	b0000093 	adrp	x19, 411000 <printf@plt+0x10b10>
  4005d8:	3940c260 	ldrb	w0, [x19, #48]
  4005dc:	35000080 	cbnz	w0, 4005ec <printf@plt+0xfc>
  4005e0:	97ffffe0 	bl	400560 <printf@plt+0x70>
  4005e4:	52800020 	mov	w0, #0x1                   	// #1
  4005e8:	3900c260 	strb	w0, [x19, #48]
  4005ec:	f9400bf3 	ldr	x19, [sp, #16]
  4005f0:	a8c27bfd 	ldp	x29, x30, [sp], #32
  4005f4:	d65f03c0 	ret
  4005f8:	17ffffe6 	b	400590 <printf@plt+0xa0>
  4005fc:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  400600:	910003fd 	mov	x29, sp
  400604:	f9000fa0 	str	x0, [x29, #24]
  400608:	39005fa1 	strb	w1, [x29, #23]
  40060c:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x4c0>
  400610:	911e2000 	add	x0, x0, #0x788
  400614:	a9400400 	ldp	x0, x1, [x0]
  400618:	a90207a0 	stp	x0, x1, [x29, #32]
  40061c:	f9400fa0 	ldr	x0, [x29, #24]
  400620:	528004a1 	mov	w1, #0x25                  	// #37
  400624:	39000001 	strb	w1, [x0]
  400628:	39405fa0 	ldrb	w0, [x29, #23]
  40062c:	53047c00 	lsr	w0, w0, #4
  400630:	12001c00 	and	w0, w0, #0xff
  400634:	12000c01 	and	w1, w0, #0xf
  400638:	f9400fa0 	ldr	x0, [x29, #24]
  40063c:	91000400 	add	x0, x0, #0x1
  400640:	93407c21 	sxtw	x1, w1
  400644:	910083a2 	add	x2, x29, #0x20
  400648:	38616841 	ldrb	w1, [x2, x1]
  40064c:	39000001 	strb	w1, [x0]
  400650:	f9400fa0 	ldr	x0, [x29, #24]
  400654:	91000400 	add	x0, x0, #0x1
  400658:	39400000 	ldrb	w0, [x0]
  40065c:	2a0003e1 	mov	w1, w0
  400660:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x4c0>
  400664:	911e0000 	add	x0, x0, #0x780
  400668:	97ffffa2 	bl	4004f0 <printf@plt>
  40066c:	39405fa0 	ldrb	w0, [x29, #23]
  400670:	12000c01 	and	w1, w0, #0xf
  400674:	f9400fa0 	ldr	x0, [x29, #24]
  400678:	91000800 	add	x0, x0, #0x2
  40067c:	93407c21 	sxtw	x1, w1
  400680:	910083a2 	add	x2, x29, #0x20
  400684:	38616841 	ldrb	w1, [x2, x1]
  400688:	39000001 	strb	w1, [x0]
  40068c:	d503201f 	nop
  400690:	a8c37bfd 	ldp	x29, x30, [sp], #48
  400694:	d65f03c0 	ret
  400698:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  40069c:	910003fd 	mov	x29, sp
  4006a0:	b9001bbf 	str	wzr, [x29, #24]
  4006a4:	390073bf 	strb	wzr, [x29, #28]
  4006a8:	910063a0 	add	x0, x29, #0x18
  4006ac:	52800c21 	mov	w1, #0x61                  	// #97
  4006b0:	97ffffd3 	bl	4005fc <printf@plt+0x10c>
  4006b4:	910063a1 	add	x1, x29, #0x18
  4006b8:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x4c0>
  4006bc:	911e6000 	add	x0, x0, #0x798
  4006c0:	97ffff8c 	bl	4004f0 <printf@plt>
  4006c4:	52800000 	mov	w0, #0x0                   	// #0
  4006c8:	a8c27bfd 	ldp	x29, x30, [sp], #32
  4006cc:	d65f03c0 	ret
  4006d0:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  4006d4:	910003fd 	mov	x29, sp
  4006d8:	a901d7f4 	stp	x20, x21, [sp, #24]
  4006dc:	90000094 	adrp	x20, 410000 <printf@plt+0xfb10>
  4006e0:	90000095 	adrp	x21, 410000 <printf@plt+0xfb10>
  4006e4:	91374294 	add	x20, x20, #0xdd0
  4006e8:	913722b5 	add	x21, x21, #0xdc8
  4006ec:	a902dff6 	stp	x22, x23, [sp, #40]
  4006f0:	cb150294 	sub	x20, x20, x21
  4006f4:	f9001ff8 	str	x24, [sp, #56]
  4006f8:	2a0003f6 	mov	w22, w0
  4006fc:	aa0103f7 	mov	x23, x1
  400700:	9343fe94 	asr	x20, x20, #3
  400704:	aa0203f8 	mov	x24, x2
  400708:	97ffff5e 	bl	400480 <__libc_start_main@plt-0x40>
  40070c:	b4000194 	cbz	x20, 40073c <printf@plt+0x24c>
  400710:	f9000bb3 	str	x19, [x29, #16]
  400714:	d2800013 	mov	x19, #0x0                   	// #0
  400718:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  40071c:	aa1803e2 	mov	x2, x24
  400720:	aa1703e1 	mov	x1, x23
  400724:	2a1603e0 	mov	w0, w22
  400728:	91000673 	add	x19, x19, #0x1
  40072c:	d63f0060 	blr	x3
  400730:	eb13029f 	cmp	x20, x19
  400734:	54ffff21 	b.ne	400718 <printf@plt+0x228>  // b.any
  400738:	f9400bb3 	ldr	x19, [x29, #16]
  40073c:	a941d7f4 	ldp	x20, x21, [sp, #24]
  400740:	a942dff6 	ldp	x22, x23, [sp, #40]
  400744:	f9401ff8 	ldr	x24, [sp, #56]
  400748:	a8c47bfd 	ldp	x29, x30, [sp], #64
  40074c:	d65f03c0 	ret
  400750:	d65f03c0 	ret

Disassembly of section .fini:

0000000000400754 <.fini>:
  400754:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400758:	910003fd 	mov	x29, sp
  40075c:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400760:	d65f03c0 	ret
